NXP Semiconductors /MIMXRT1021 /CCM /CCGR2

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Interpret as CCGR2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CG00CG10CG20CG30CG40CG50CG60CG70CG80CG90CG10 0CG11 0CG12 0CG13 0CG14 0CG15

Description

CCM Clock Gating Register 2

Fields

CG0

ocram_exsc clock (ocram_exsc_clk_enable)

CG1

Reserved

CG2

iomuxc_snvs clock (iomuxc_snvs_clk_enable)

CG3

lpi2c1 clock (lpi2c1_clk_enable)

CG4

lpi2c2 clock (lpi2c2_clk_enable)

CG5

lpi2c3 clock (lpi2c3_clk_enable)

CG6

OCOTP_CTRL clock (ocotp_clk_enable)

CG7

Reserved

CG8

Reserved

CG9

Reserved

CG10

Reserved

CG11

xbar1 clock (xbar1_clk_enable)

CG12

xbar2 clock (xbar2_clk_enable)

CG13

gpio3 clock (gpio3_clk_enable)

CG14

Reserved

CG15

Reserved

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